Venkatesh Kannan

Venkatesh Kannan, Ph.D.

Centre Technical Manager
Novel Technologies Programme Manager
+353 1 529 1028
HPC Hub Dublin

Venkatesh is the Technical Manager at the Irish Centre for High-End Computing (ICHEC), Ireland’s national supercomputing centre. This involves working with all ICHEC staff including a team of 40 computational scientists on a number of academic, public and private sector projects across offices in Dublin and Galway. Venkatesh develops and manages partnerships to undertake computation-driven research and technical development in European and domestic programmes. This includes advising the ICHEC Director on strategic directions, identifying and progressing new partnerships, managing and the co-ordination all of the Centre’s technical activities. Venkatesh represents ICHEC for relevant Irish and EU initiatives.

Venkatesh also manages the Novel Technologies Programme, which involves defining and accomplishing ICHEC's strategy with technologies that include conventional HPC, accelerator technologies (Intel Xeon Phi, GPU and FPGA), parallelisation, auto-tuning for energy-efficiency and exascale computing. A significant part of my work involves investigating the use of conventional HPC solutions and emerging techniques (Machine Learning, Deep Learning, Blockchain and Quantum Computing) for application to ICHEC's industrial and research projects. This includes working with in-house and external partners in academia and industry to apply conventional and emerging HPC solutions to their requirements.

Additionally, Venkatesh leads the Intel Parallel Computing Center (IPCC) at ICHEC, and is a principle investigator, work package lead and task lead in multiple EU projects (H2020 and PRACE). He is actively involved as co-ordinator and/or principle investigator in proposals for EU projects.

Prior to ICHEC, Venkatesh has experience in functional programming, program transformation, Petri nets, and system modelling for simulation and analysis. His love for teaching takes me to academic and industrial training when time permits.


  • Coordinator and PI, Irish Quantum Programming Initiative at ICHEC, 2018 – present.
  • PI, Quantum Natural Language Programming on Intel Quantum Simulator, 2019 – 2020.
  • Co-PI/WP leader, PRACE 6IP (EU H2020-INFRAEDI-01-2018), 2019 – 2022.
  • Task leader, PRACE 5IP-WP7 (EU H2020-INFRAEDI-11-2016), 2017 – 2019.
  • PI, Intel Parallel Computing Center (IPCC), 2017 – present.
  • PI, READEX (EU H2020-FETHPC-1-2014), 2016 – 2018.
  • Coordinator, collaboration with University of Limerick for National M.Sc. in Artificial Intelligence.
  • Trainer/lecturer for ICHEC courses in HPC for academic and industry participants.

Working Areas & Interests

  • Exascale computing
  • Auto-tuning for energy efficiency and performance
  • Parallel programming models and constructs for extreme-scale and exascale
  • Parallelisation on accelerators (IXP, GPU)
  • Functional program transformation for parallelism
  • Programming quantum platforms
  • Machine vision, machine/deep learning
  • Blockchain technology


  • Doctor of Philosophy, School of Computing, Dublin City University, Ireland.
  • Master of Science in Information and Communication Systems, Hamburg University of Technology (TUHH), Germany.
  • Bachelor of Engineering in Computer Science and Engineering, University of Madras, India.


  • PI, “Quantum Natural Language Processing” from Enterprise Ireland and Intel, 2018 (Total & Share: 151,543).
  • Co-PI/WP Leader, “PRACE 6IP” from EU (H2020-INFRAEDI-01-2018), 2018 (Total: 24M, Share: 580,388).
  • H2020 coordinator support from Enterprise Ireland, 2017 (Total & Share: 11,920).

Talks and Contributions

  • Invited talk & panelist, "The CIO's Guide to Quantum Computing", CIO and IT Leaders Summit, Dublin (Ireland), Sep 2019.
  • Organiser, International Workshop on Architecture-Aware Simulation & Computing (AASC) at the International Conference on High-Performance Computing & Simulation (HPCS), Dublin (Ireland), Jul 2019.
  • Invited talk, "The Reaches of HPC and AI", Tech Connect Live Summit, Dublin (Ireland), Jun 2019.
  • Talk, "Tuning Alya with READEX for Energy Efficiency", SupercomputingAsia (SCAsia), Singapore, Feb 2019.
  • Invited talk, "Quantum Programming at ICHEC", All Ireland Quantum Technologies Conference, Maynooth (Ireland), Jan 2019.
  • Co-chair & invited talk, "Exploiting Application Dynamism for Exascale Energy Efficiency", PRACE-CoEs-FET HPC-EXDCI Workshop, Brühl (Germany), Oct 2018.
  • Talk, "Demystifying Deep Learning", Deep Learning Day at Microsoft, Dublin (Ireland), Jun 2018.
  • Talk, "READEX for Exascale Energy Efficiency", International Supercomputing (ISC), Frankfurt a.M. (Germany), Jun 2018.
  • Invited talk, PRACE-5IP Exascale Systems Workshop, Jülich (Germany), Jun 2017.
  • Invited talk & trainer, All-India Faculty Development Programme on Heterogeneous Computing and OpenCL by AMD India, Chennai (India), Sep 2011.
  • Team Mentor, ISRO's SRMSAT-1 Nanosatellite, SRM University (India), 2010-11.

Book Chapters

  1. P.G. Kjeldsberg, R. Schöne, M. Gerndt, L. Riha, V. Kannan, K. Diethelm, M-C. Sawley, J.Zapletal, O. Vysocky, M.Kumaraswamy, and W.E. Nagel, “Runtime Exploitation of Application Dynamism for Energy-efficient Exascale Computing”, System Scenario-based Design Principles and Applications, Springer International Publishing AG, Switzerland, 2018. (under review)


  1. Ondrej Vysocky, Jan Zapletal, Michael Lysaght, Venkatesh Kannan, Vojtech Nikl, Martin Beseda, Lubomir Riha, “Energy-efficient Computing Achieved by Manual Evaluation of the Dynamic Behaviour of HPC Applications”, Advances in Engineering Software, Elsevier Journal, 2017.
  2. Joseph Schuchart, Michael Gerndt, Per Gunnar Kjeldsberg, Michael Lysaght, David Horak, Lubomir Riha, Andreas Gocht, Mohammed Sourouri, Madhura Kumaraswamy, Anamika Chowdhury, Magnus Jahre, Kai Diethelm, Othman Bouizi, Umbreen Sabir Mian, Jakub Kruzik, Radim Sojka, Martin Beseda, Venkatesh Kannan, Zakaria Bendifallah, Daniel Hackenberg, Wolfgang E. Nagel, “The READEX Formalism for Automatic Tuning for Energy Efficiency”, Springer Computing Journal, 2017.
  3. Venkatesh Kannan and G.W. Hamilton, “Functional Program Transformation for Parallelisation using Skeletons”, 9th International Symposium on High-Level Parallel Programming and Applications (HLPP), revised version in International Journal of Parallel Programming (IJPP), 2018.
  4. Venkatesh Kannan and G.W. Hamilton, “Program Transformation To Identify List-Based Parallel Skeletons”, 4th International Workshop on Verification and Program Transformation (VPT), revised version in Electronic Proceedings in Theoretical Computer Science (EPTCS), 2016.

Conference Proceedings

  1. Ondrej Vysocky, Martin Beseda, Lubomir Riha, Jan Zapletal, Michael Lysaght, Venkatesh Kannan, “MERIC and RADAR Generator: Tools for Energy Evaluation and Runtime Tuning of HPC Applications”, High Performance Computing in Science and Engineering (HPCSE), 2018.
  2. Ondrej Vysocky, Martin Beseda, Lubomir Riha, Jan Zapletal, Vojtech Nikl, Michael Lysaght, Venkatesh Kannan, “Evaluation of the HPC Applications Dynamic Behavior in Terms of Energy Consumption”, 5th International Conference on Parallel, Distributed, Grid and Cloud Computing for Engineering (Civil-Comp Press), 2017.
  3. Venkatesh Kannan, G. W. Hamilton, “Distilling New Data Types”, 5th International Valentin Turchin Workshop on Metacomputing (META), 2016.
  4. Venkatesh Kannan, G. W. Hamilton, “Extraction of Data Parallel Computations from Distilled Programs”, 4th International Valentin Turchin Workshop on Metacomputing (META), 2014.
  5. Venkatesh Kannan, Sahena Ahmed, “A Resource Perspective to Wireless Sensor Network Security”, IEEE Proceedings of 5th International Conference on Innovative Mobile and Internet Services in Ubiquitous Computing (IMIS), 2011.
  6. Venkatesh Kannan, Marc Voorhoeve, Lou Somers, “Datapath Architecture Simulation”, IEEE Proceedings of 23rd European Simulation and Modelling Conference (EUROSIS ESM), 2009.
  7. Venkatesh Kannan, Wil M.P. van der Aalst, Marc Voorhoeve, “Formal Modeling and Analysis by Simulation of Data Paths in Digital Document Printer”, 9th Workshop and Tutorial on Practical Use of Coloured Petri Nets and CPN Tools, 2008.
  8. G. Igna, Venkatesh Kannan, Yang Yang, T. Basten, M. C. W. Geilen, F. W. Vaandrager, M. Voorhoeve, S. De Smet, L. J. A. M. Somers, “Formal Modeling and Scheduling of Datapaths of Digital Document Printers”, Springer Proceedings of 6th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS), 2008.

  9. Venkatesh K., Aravind S., Ganapath Ram R., Srinivasan T., “A High Performance Parallel IP Lookup Technique Using Distributed Memory Organisation”, IEEE Proceedings of Information Technology: Coding and Computing (ITCC), 2004.

White Papers

  1. Venkatesh Kannan, Ricard Borrell, Myles Doyle, Guillaume Houzeaux, “Tuning Alya for Energy Efficiency with READEX”, Partnership for Advanced Computing in Europe (PRACE 5IP), 2019. (under review)

  2. Venkatesh Kannan, Lubomir Riha, Michael Gerndt, Anamika Chowdhury, Ondrej Vysocky, Martin Beseda, Horak David, Radim Sojka, Jakub Kruzik, Michael Lysaght, “Investigating and Exploit- ing Application Dynamism For Energy-Efficient Exascale Computing”, Partnership for Advanced Computing in Europe (PRACE 4IP), 2017.